As semiconductor integrated circuits have scaled, both lateral and vertical dimensions have decreased. As the depth of isolated wells has decreased, the cross sectional area of the well under isolation such as shallow trench isolation (STI) has decreased resulting in increased resistance. To compensate retrograde well doping is used, where the doping at the bottom of the well is increased thus reducing the well resistance under the STI.
While retrograde well doping is sufficient for nominal voltages the well resistance under the STI may still be sufficiently high to cause a significant voltage drop when the well is under high bias and significant current is flowing between the well contact and a device such as a transistor formed in the isolated well. This drop in voltage negatively impacts the performance of the device.
A typical integrated circuit with a transistor formed in an isolated well is illustrated in FIG. 1. The transistor 110 is formed in the isolated well 104 in substrate 102. Shallow trench isolation (STI) geometries 108 electrically isolate the well 104 from the substrate 102 by blocking silicide 112 from shorting the well contact diffusion 146 to the substrate contact diffusion 156. STI geometries 106 electrically isolate the well contact diffusions 146 from the transistor source and drain diffusions 154. Contact plugs 116 couple diffusions 156, 154, and 146 in the substrate 102 and well 104 to the first level of interconnect 126.
The cross sectional area 114 of the well 104 under the STI geometry 106 is significantly smaller than the cross sectional area of the well adjacent to the STI geometry. This smaller cross sectional area 114 may cause current crowding when high bias is applied to the well 104 and significant current flows between a device diffusion 154 (such as a transistor) and the well contact diffusion 146. This current crowding may cause a voltage drop which may negatively impact the performance of a device such as a transistor 110.